From 9cc2f0e6aab60cb23dc18eb42ba4cb06fb232330 Mon Sep 17 00:00:00 2001
From: z3deverp <z3@vmsv-debian.(none)>
Date: Sat, 14 Nov 2009 01:25:25 +0900
Subject: [PATCH] sha_pon basic support

---
 arch/arm/mach-pxa/Kconfig                   |   32 +
 arch/arm/mach-pxa/Makefile                  |    2 +
 arch/arm/mach-pxa/include/mach/sha_pon.h    |  458 +++++++++++++++
 arch/arm/mach-pxa/include/mach/uncompress.h |    6 +
 arch/arm/mach-pxa/sha_pon.c                 |  809 +++++++++++++++++++++++++++
 5 files changed, 1307 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 89c992b..874a77e 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -489,6 +489,38 @@ config MACH_EZX_E2
 	default y
 	depends on PXA_EZX
 
+config PXA_SHA_PON
+	bool "Sharp W-ZERO3 WS0xxSH series smartphone"
+	select PXA27x
+	help
+	  Say Y here if you intend to run this kernel on a
+	  Sharp W-ZERO3 WS0xxSH series(Sha_pon0xx) smartphone.
+
+config MACH_SHA_PON003
+        bool "Sharp W-ZERO3 WS003SH"
+        default y
+        depends on PXA_SHA_PON
+
+config MACH_SHA_PON004
+        bool "Sharp W-ZERO3 WS004SH"
+        default y
+        depends on PXA_SHA_PON
+
+config MACH_SHA_PON007
+        bool "Sharp W-ZERO3[es] WS007SH"
+        default y
+        depends on PXA_SHA_PON
+
+config MACH_SHA_PON011
+        bool "Sharp Advanced/W-ZERO3[es] WS011SH"
+        default y
+        depends on PXA_SHA_PON
+
+config MACH_SHA_PON020
+        bool "Sharp WILLCOM 03 WS020SH"
+        default y
+        depends on PXA_SHA_PON
+
 endmenu
 
 config PXA25x
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index d4c6122..8b03e69 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -83,6 +83,8 @@ obj-$(CONFIG_MACH_STARGATE2)	+= stargate2.o
 obj-$(CONFIG_MACH_CSB726)	+= csb726.o
 obj-$(CONFIG_CSB726_CSB701)	+= csb701.o
 
+obj-$(CONFIG_PXA_SHA_PON)       += sha_pon.o
+
 # Support for blinky lights
 led-y := leds.o
 led-$(CONFIG_ARCH_LUBBOCK)	+= leds-lubbock.o
diff --git a/arch/arm/mach-pxa/include/mach/sha_pon.h b/arch/arm/mach-pxa/include/mach/sha_pon.h
new file mode 100644
index 0000000..6e6775b
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/sha_pon.h
@@ -0,0 +1,458 @@
+/*
+ *  linux/include/asm-arm/arch-pxa/sha_pon.h
+ *
+ *  SHA_PON specific bits definition
+ *
+ *  Auther: zaki
+ *
+ *  Based on linux/include/asm-arm/arch-aaec2000/aaed2000.h
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_SHA_PON_H
+#define __ASM_ARCH_SHA_PON_H
+
+
+/* interface for CPLD */
+u32 sha_pon_cpld_get(unsigned int regoffset);
+void sha_pon_cpld_set(unsigned regoffset, u32 data);
+
+/* cpld: write 8bit */
+#define SHA_PON_W8_KEYMATRIX_COL_L	0	/*Key matrix strobe(bit0-7): 0/1=OFF/ON*/
+#define SHA_PON_W8_KEYMATRIX_COL_H	1	/*Key matrix strobe(bit0-3): 0/1=OFF/ON*/
+#define SHA_PON_W8_KEYMATRIX_DISCH	2	/*Key matrix discharge(bit0): 0/1=normal/discharge*/
+
+/* cpld: read 8bit */
+#define SHA_PON_R8_KEYMATRIX_ROW	2	/*Key matrix data(bit0-7): 0/1=pressed/released*/
+
+
+/* interface for gpio that includes CPLD */
+void sha_pon_gpio_bit_set(unsigned cpld_bitoffset, int value);
+/* gpio0-127: pxa270 internal gpio */
+#define SHA_PON_GPIO_OFFSET_CPLD_W	128	/* gpio128-191: CPLD write */
+#define SHA_PON_GPIO_OFFSET_CPLD_R	192	/* gpio192-255: CPLD read */
+
+
+/*SHA_PON0xx common gpio */
+#define SHA_PON_P_RDY	18	/**/
+#define SHA_PON_P_CIF_FV	24	/**/
+#define SHA_PON_P_CIF_LV	25	/**/
+#define SHA_PON_P_CIF_PCLK	26	/**/
+#define SHA_PON_P_CIF_DD0	27	/**/
+#define SHA_PON_P_I2S_BITCLK	28	/**/
+#define SHA_PON_P_I2S_SDATA_IN	29	/**/
+#define SHA_PON_P_I2S_SDATA_OUT	30	/**/
+#define SHA_PON_P_I2S_SYNC	31	/**/
+#define SHA_PON_P_MMCLK	32	/**/
+#define SHA_PON_P_BTRXD	42	/**/
+#define SHA_PON_P_BTTXD	43	/**/
+#define SHA_PON_P_STD_TXD	47	/**/
+#define SHA_PON_P_nPWE	49	/**/
+#define SHA_PON_P_LDD0	58	/**/
+#define SHA_PON_P_LDD1	59	/**/
+#define SHA_PON_P_LDD2	60	/**/
+#define SHA_PON_P_LDD3	61	/**/
+#define SHA_PON_P_LDD4	62	/**/
+#define SHA_PON_P_LDD5	63	/**/
+#define SHA_PON_P_LDD6	64	/**/
+#define SHA_PON_P_LDD7	65	/**/
+#define SHA_PON_P_LDD8	66	/**/
+#define SHA_PON_P_LDD9	67	/**/
+#define SHA_PON_P_LDD10	68	/**/
+#define SHA_PON_P_LDD11	69	/**/
+#define SHA_PON_P_LDD12	70	/**/
+#define SHA_PON_P_LDD13	71	/**/
+#define SHA_PON_P_LDD14	72	/**/
+#define SHA_PON_P_LDD15	73	/**/
+#define SHA_PON_P_L_FCK_RD	74	/**/
+#define SHA_PON_P_L_LCLK_A0	75	/**/
+#define SHA_PON_P_L_PCLK_WR	76	/**/
+#define SHA_PON_P_nCS2	78	/**/
+#define SHA_PON_P_MMDAT0	92	/**/
+#define SHA_PON_P_CIF_DD6	93	/**/
+#define SHA_PON_P_CIF_DD5	94	/**/
+#define SHA_PON_P_FFRTS	98	/**/
+#define SHA_PON_P_FFTXD	99	/**/
+#define SHA_PON_P_FFCTS	100	/**/
+#define SHA_PON_P_FFRXD	102	/**/
+#define SHA_PON_P_CIF_DD7	108	/**/
+#define SHA_PON_P_MMDAT1	109	/**/
+#define SHA_PON_P_MMDAT2	110	/**/
+#define SHA_PON_P_MMDAT3	111	/**/
+#define SHA_PON_P_MMCMD	112	/**/
+#define SHA_PON_P_I2S_SYSCLK	113	/**/
+#define SHA_PON_P_SCL	117	/**/
+#define SHA_PON_P_SDA	118	/**/
+
+
+/**/
+#define SHA_PON003_P_BTCTS	44	/**/
+#define SHA_PON007_P_BTCTS	44	/**/
+#define SHA_PON003_P_BTRTS	45	/**/
+#define SHA_PON007_P_BTRTS	45	/**/
+#define SHA_PON003_P_STD_RXD	46	/**/
+#define SHA_PON007_P_STD_RXD	46	/**/
+#define SHA_PON003_P_FFDCD	36	/**/
+
+#define SHA_PON003_P_CIF_DD1	55	/**/
+#define SHA_PON007_P_CIF_DD1	55	/**/
+#define SHA_PON011_P_CIF_DD1	114	/**/
+#define SHA_PON003_P_CIF_DD2	51	/**/
+#define SHA_PON007_P_CIF_DD2	51	/**/
+#define SHA_PON011_P_CIF_DD2	104	/**/
+#define SHA_PON003_P_CIF_DD3	50	/**/
+#define SHA_PON007_P_CIF_DD3	50	/**/
+#define SHA_PON011_P_CIF_DD3	103	/**/
+#define SHA_PON003_P_CIF_DD4	52	/**/
+#define SHA_PON007_P_CIF_DD4	90	/**/
+#define SHA_PON011_P_CIF_DD4	95	/**/
+
+#define SHA_PON003_P_SSPSCLK3	34	/**/
+#define SHA_PON007_P_SSPSCLK3	52	/**/
+#define SHA_PON003_P_SSPRXD3	82	/**/
+#define SHA_PON007_P_SSPRXD3	89	/**/
+#define SHA_PON003_P_SSPTXD3	38	/**/
+#define SHA_PON007_P_SSPTXD3	38	/**/
+
+#define SHA_PON007_P_SSPSCLK2	19	/**/
+#define SHA_PON011_P_SSPSCLK2	19	/**/
+#define SHA_PON007_P_SSPRXD2	86	/**/
+#define SHA_PON011_P_SSPRXD2	86	/**/
+#define SHA_PON007_P_SSPTXD2	87	/**/
+#define SHA_PON011_P_SSPTXD2	87	/**/
+
+#define SHA_PON003_P_L_BIAS	77	/**/
+#define SHA_PON003_P_nCS3	79	/**/
+
+#define SHA_PON011_P_PWM_OUT0	38	/**/
+
+
+/**/
+#define SHA_PON_O_LED_ANNTENA_RED	(SHA_PON_GPIO_OFFSET_CPLD_W + 24)	/*LED anntena RED: 0/1=OFF/ON*/
+#define SHA_PON_O_LED_ANNTENA_GREEN	(SHA_PON_GPIO_OFFSET_CPLD_W + 25)	/*LED anntena GREEN: 0/1=OFF/ON*/
+#define SHA_PON_O_LED_ANNTENA_MODE	(SHA_PON_GPIO_OFFSET_CPLD_W + 27)	/*LED control mode: 0/1=cpld/w-sim? */
+#define SHA_PON_O_WSIM_POWER		(SHA_PON_GPIO_OFFSET_CPLD_W + 36)	/*W-SIM power control: 0/1=OFF/ON*/
+#define SHA_PON_O_LED_10KEY1		(SHA_PON_GPIO_OFFSET_CPLD_W + 40)	/*I don't know what to use ;-) 0/1=?*/
+#define SHA_PON_O_LED_10KEY2		(SHA_PON_GPIO_OFFSET_CPLD_W + 41)	/*I don't know what to use ;-) 0/1=?*/
+#define SHA_PON_O_LED_10KEY3		(SHA_PON_GPIO_OFFSET_CPLD_W + 42)	/*I don't know what to use ;-) 0/1=?*/
+#define SHA_PON_O_VIBLATOR		(SHA_PON_GPIO_OFFSET_CPLD_W + 44)	/*Viblator: 0/1=OFF/ON*/
+
+#define SHA_PON007_O_LED_FULLKEY	17	/*LED Fullkeyboard: 0/1=OFF/ON*/
+
+
+/**/
+#define SHA_PON_I_DET_HEADSET_ANSWER	(SHA_PON_GPIO_OFFSET_CPLD_R + 56)	/*Headset answer key: 0/1=pressed/released*/
+#define SHA_PON_I_DET_HEADSET_CONNECT	(SHA_PON_GPIO_OFFSET_CPLD_R + 57)	/*Headset: 0/1=connected/not connected*/
+#define SHA_PON_I_DET_BATTERY_CASE_OPEN	(SHA_PON_GPIO_OFFSET_CPLD_R + 58)	/*Battery case: 0/1=open/close*/
+#define SHA_PON_I_DET_KEYBOARD_OPEN	(SHA_PON_GPIO_OFFSET_CPLD_R + 60)	/*Keyboard: 0/1=close/open*/
+#define SHA_PON_I_DET_MEMCARD		(SHA_PON_GPIO_OFFSET_CPLD_R + 62)	/*memory card: 0/1=inserted/ejected*/
+
+#define SHA_PON003_I_DET_MEMCARD	9	/*memory card: 0/1=inserted/ejected*/
+#define SHA_PON007_I_DET_MEMCARD	48	/*memory card: 0/1=inserted/ejected*/
+
+#define SHA_PON003_I_DET_KEYBOARD_OPEN	12	/*Keyboard: 0/1=open/close*/
+#define SHA_PON007_I_DET_KEYBOARD_OPEN	104	/*Keyboard: 0/1=close/open*/
+
+#define SHA_PON003_I_DET_USB_VBUS	103	/*USB VBUS detect: 0/1=yes/no*/
+#define SHA_PON007_I_DET_USB_VBUS	35	/*USB VBUS detect: 0/1=yes/no*/
+#define SHA_PON007_I_DET_USB_MiniA	41	/*USB miniA cable: 0/1=Inserted/Ejected*/
+#define SHA_PON011_I_DET_USB_MiniA	41	/*USB miniA cable: 0/1=Inserted/Ejected*/
+#define SHA_PON007_O_USB_POWER		37	/*USB Host Power: 0/1=OFF/ON*/
+
+#define SHA_PON003_I_DET_BATTERY	35	/*Battery: 0/1=Ejected/Inserted*/
+#define SHA_PON007_I_DET_BATTERY_1	11	/*Battery: 0/1=Ejected/Inserted*/
+#define SHA_PON007_I_DET_BATTERY_2	13	/*Battery: 0/1=Ejected/Inserted*/
+
+#define SHA_PON007_I_DET_HSYNC		75	/*L_LCLK_A0 at TFT LCD: 0/1=HSync Enable/Disable*/
+#define SHA_PON007_I_DET_TOUCHSCREEN	21	/*Touchscreen: 0/1=Pressed/Relesed*/
+#define SHA_PON007_O_CS_TOUCHSCREEN	33	/*Touchscreen CS: 0/1=Enabel/Disable*/
+
+#define SHA_PON007_I_DET_HEADSET_ANSWER	114	/*Headset answer key: 0/1=pressed/released*/
+#define SHA_PON007_I_DET_HEADSET_CONNECT	116	/*Headset: 0/1=connected/not connected*/
+
+
+#if 0	/* not understand what to do  */
+
+/*SHA_PON003 gpio */
+#define SHA_PON003_I_	0	/**/
+#define SHA_PON003_I_	1	/**/
+#define SHA_PON003_I_	2	/**/
+#define SHA_PON003_I_	3	/**/
+#define SHA_PON003_I_	4	/**/
+#define SHA_PON003_I_	5	/**/
+#define SHA_PON003_I_	6	/**/
+#define SHA_PON003_I_	7	/**/
+#define SHA_PON003_I_	8	/**/
+#define SHA_PON003_O_	10	/**/
+#define SHA_PON003_I_	11	/**/
+#define SHA_PON003_I_	13	/**/
+#define SHA_PON003_I_	14	/**/
+#define SHA_PON003_I_	15	/**/
+#define SHA_PON003_O_	16	/**/
+#define SHA_PON003_O_	17	/**/
+#define SHA_PON003_O_	19	/**/
+#define SHA_PON003_O_	20	/**/
+#define SHA_PON003_O_	21	/**/
+#define SHA_PON003_I_	22	/**/
+#define SHA_PON003_O_	23	/**/
+#define SHA_PON003_O_	33	/**/
+#define SHA_PON003_O_	37	/**/
+#define SHA_PON003_O_	39	/**/
+#define SHA_PON003_O_	40	/**/
+#define SHA_PON003_I_	41	/**/
+#define SHA_PON003_O_	48	/**/
+#define SHA_PON003_I_	53	/**/
+#define SHA_PON003_O_	54	/**/
+#define SHA_PON003_O_	56	/**/
+#define SHA_PON003_O_	57	/**/
+#define SHA_PON003_I_	80	/**/
+#define SHA_PON003_I_	81	/**/
+#define SHA_PON003_I_	83	/**/
+#define SHA_PON003_I_	84	/**/
+#define SHA_PON003_I_	85	/**/
+#define SHA_PON003_I_	86	/**/
+#define SHA_PON003_O_	87	/**/
+#define SHA_PON003_O_	88	/**/
+#define SHA_PON003_O_	89	/**/
+#define SHA_PON003_O_	90	/**/
+#define SHA_PON003_I_	91	/**/
+#define SHA_PON003_I_	95	/**/
+#define SHA_PON003_I_	96	/**/
+#define SHA_PON003_O_	97	/**/
+#define SHA_PON003_I_	101	/**/
+#define SHA_PON003_O_	104	/**/
+#define SHA_PON003_I_	105	/**/
+#define SHA_PON003_I_	106	/**/
+#define SHA_PON003_O_	107	/**/
+#define SHA_PON003_O_	114	/**/
+#define SHA_PON003_I_	115	/**/
+#define SHA_PON003_I_	116	/**/
+#define SHA_PON003_O_	119	/**/
+#define SHA_PON003_O_	120	/**/
+
+
+/*SHA_PON007 gpio */
+
+#define SHA_PON007_I_	0	/**/
+#define SHA_PON007_I_	1	/**/
+#define SHA_PON007_I_	2	/**/
+#define SHA_PON007_I_	3	/**/
+#define SHA_PON007_I_	4	/**/
+#define SHA_PON007_I_	5	/**/
+#define SHA_PON007_I_	6	/**/
+#define SHA_PON007_I_	7	/**/
+#define SHA_PON007_I_	8	/**/
+#define SHA_PON007_I_	9	/**/
+#define SHA_PON007_O_	10	/**/
+#define SHA_PON007_I_	12	/**/
+#define SHA_PON007_I_	14	/**/
+#define SHA_PON007_O_	15	/**/
+#define SHA_PON007_O_	16	/**/
+#define SHA_PON007_I_	20	/**/
+#define SHA_PON007_I_	22	/**/
+#define SHA_PON007_O_	23	/**/
+#define SHA_PON007_O_	34	/**/
+#define SHA_PON007_O_	36	/**/
+#define SHA_PON007_O_	39	/**/
+#define SHA_PON007_O_	40	/**/
+#define SHA_PON007_I_	53	/**/
+#define SHA_PON007_I_	54	/**/
+#define SHA_PON007_I_	56	/**/
+#define SHA_PON007_O_	57	/**/
+#define SHA_PON007_I_	77	/**/
+#define SHA_PON007_O_	79	/**/
+#define SHA_PON007_I_	80	/**/
+#define SHA_PON007_I_	81	/**/
+#define SHA_PON007_O_	82	/**/
+#define SHA_PON007_I_	83	/**/
+#define SHA_PON007_I_	84	/**/
+#define SHA_PON007_I_	85	/**/
+#define SHA_PON007_I_	88	/**/
+#define SHA_PON007_I_	91	/**/
+#define SHA_PON007_O_	95	/**/
+#define SHA_PON007_I_	96	/**/
+#define SHA_PON007_I_	97	/**/
+#define SHA_PON007_I_	101	/**/
+#define SHA_PON007_O_	103	/**/
+#define SHA_PON007_I_	105	/**/
+#define SHA_PON007_I_	106	/**/
+#define SHA_PON007_O_	107	/**/
+#define SHA_PON007_I_	115	/**/
+#define SHA_PON007_O_	119	/**/
+#define SHA_PON007_O_	120	/**/
+
+
+/*SHA_PON011 gpio */
+#define SHA_PON011_P_	0	/**/
+#define SHA_PON011_P_	1	/**/
+#define SHA_PON011_P_	2	/**/
+#define SHA_PON011_P_	3	/**/
+#define SHA_PON011_P_	4	/**/
+#define SHA_PON011_P_	5	/**/
+#define SHA_PON011_P_	6	/**/
+#define SHA_PON011_P_	7	/**/
+#define SHA_PON011_P_	8	/**/
+#define SHA_PON011_P_	9	/**/
+#define SHA_PON011_P_	10	/**/
+#define SHA_PON011_P_	11	/**/
+#define SHA_PON011_P_	12	/**/
+#define SHA_PON011_P_	13	/**/
+#define SHA_PON011_P_	14	/**/
+#define SHA_PON011_P_	15	/**/
+#define SHA_PON011_P_	16	/**/
+#define SHA_PON011_P_	17	/**/
+#define SHA_PON011_P_	20	/**/
+#define SHA_PON011_P_	21	/**/
+#define SHA_PON011_P_	22	/**/
+#define SHA_PON011_P_	23	/**/
+#define SHA_PON011_P_	33	/**/
+#define SHA_PON011_P_	34	/**/
+#define SHA_PON011_P_	35	/**/
+#define SHA_PON011_P_	36	/**/
+#define SHA_PON011_P_	37	/**/
+#define SHA_PON011_P_	39	/**/
+#define SHA_PON011_P_	40	/**/
+#define SHA_PON011_P_	41	/**/
+#define SHA_PON011_P_	44	/**/
+#define SHA_PON011_P_	45	/**/
+#define SHA_PON011_P_	46	/**/
+#define SHA_PON011_P_	48	/**/
+#define SHA_PON011_P_	50	/**/
+#define SHA_PON011_P_	51	/**/
+#define SHA_PON011_P_	52	/**/
+#define SHA_PON011_P_	53	/**/
+#define SHA_PON011_P_	54	/**/
+#define SHA_PON011_P_	55	/**/
+#define SHA_PON011_P_	56	/**/
+#define SHA_PON011_P_	57	/**/
+#define SHA_PON011_P_	77	/**/
+#define SHA_PON011_P_	78	/**/
+#define SHA_PON011_P_	79	/**/
+#define SHA_PON011_P_	80	/**/
+#define SHA_PON011_P_	81	/**/
+#define SHA_PON011_P_	82	/**/
+#define SHA_PON011_P_	83	/**/
+#define SHA_PON011_P_	84	/**/
+#define SHA_PON011_P_	85	/**/
+#define SHA_PON011_P_	88	/**/
+#define SHA_PON011_P_	89	/**/
+#define SHA_PON011_P_	90	/**/
+#define SHA_PON011_P_	91	/**/
+#define SHA_PON011_P_	96	/**/
+#define SHA_PON011_P_	97	/**/
+#define SHA_PON011_P_	101	/**/
+#define SHA_PON011_P_	105	/**/
+#define SHA_PON011_P_	106	/**/
+#define SHA_PON011_P_	107	/**/
+#define SHA_PON011_P_	115	/**/
+#define SHA_PON011_P_	116	/**/
+#define SHA_PON011_P_	119	/**/
+#define SHA_PON011_P_	120	/**/
+
+
+/*CPLD*/
+/*write-0x0c*/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 26)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 28)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 29)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 30)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 31)	/**/
+/*write-0x10*/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 32)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 33)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 34)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 35)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 37)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 38)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 39)	/**/
+/*write-0x14*/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 43)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 45)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 46)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 47)	/**/
+/*write-0x18*/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 48)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 49)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 50)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 51)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 52)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 53)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 54)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 55)	/**/
+/*write-0x1c*/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 56)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 57)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 58)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 59)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 60)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 61)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 62)	/**/
+#define SHA_PON_O_	(SHA_PON_GPIO_OFFSET_CPLD_W + 63)	/**/
+
+
+/*read-0x00*/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 0)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 1)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 2)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 3)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 4)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 5)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 6)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 7)	/**/
+/*read-0x04*/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 8)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 9)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 10)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 11)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 12)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 13)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 14)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 15)	/**/
+/*read-0x0c*/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 24)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 25)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 26)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 27)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 28)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 29)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 30)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 31)	/**/
+/*read-0x10*/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 32)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 33)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 34)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 35)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 36)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 37)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 38)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 39)	/**/
+/*read-0x14*/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 40)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 41)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 42)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 43)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 44)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 45)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 46)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 47)	/**/
+/*read-0x18*/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 48)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 49)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 50)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 51)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 52)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 53)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 54)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 55)	/**/
+/*read-0x1c*/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 59)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 61)	/**/
+#define SHA_PON_I_	(SHA_PON_GPIO_OFFSET_CPLD_R + 63)	/**/
+
+#endif
+
+
+#endif /* __ARM_ARCH_SHA_PON_H */
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index b547494..16fe97e 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -19,6 +19,8 @@ static volatile unsigned long *UART = FFUART;
 
 static inline void putc(char c)
 {
+	if ( UART == NULL )
+		return;
 	if (!(UART[UART_IER] & IER_UUE))
 		return;
 	while (!(UART[UART_LSR] & LSR_TDRQ))
@@ -39,6 +41,10 @@ static inline void arch_decomp_setup(void)
 	    || machine_is_csb726() || machine_is_stargate2()
 	    || machine_is_cm_x300())
 		UART = STUART;
+	if ( machine_is_sha_pon003() || machine_is_sha_pon004()
+	    || machine_is_sha_pon007() || machine_is_sha_pon011()
+	    || machine_is_sha_pon020() )
+		UART = NULL;
 }
 
 /*
diff --git a/arch/arm/mach-pxa/sha_pon.c b/arch/arm/mach-pxa/sha_pon.c
new file mode 100644
index 0000000..70c1ba7
--- /dev/null
+++ b/arch/arm/mach-pxa/sha_pon.c
@@ -0,0 +1,809 @@
+/*
+ * linux/arch/arm/mach-pxa/sha_pon.c
+ *
+ * Support for the Sharp W-ZERO3 series(sha_pon0**).
+ * based on lpd270.c, corgi.c
+ *
+ * Author:	zaki
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+#include <linux/delay.h>
+#include <linux/sysdev.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+#include <linux/input.h>
+
+#include <asm/setup.h>
+#include <asm/memory.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/gpio.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+/*
+#include <mach/pxa-regs.h>
+*/
+#include <mach/pxa2xx-regs.h>
+#include <mach/mfp-pxa27x.h>
+#include <mach/pxa27x-udc.h>
+#include <mach/pxa2xx_spi.h>
+#include <mach/pxafb.h>
+#include <mach/udc.h>
+#include <mach/ohci.h>
+/*
+#include <mach/i2c.h>
+*/
+#include <mach/mmc.h>
+#include <mach/irda.h>
+#include <mach/camera.h>
+#include <mach/audio.h>
+#include <mach/system.h>
+
+#include "generic.h"
+#include "devices.h"
+
+#include <mach/sha_pon.h>
+
+
+/* CPLD as external GPIOs. */
+#define EXT_GPIO_PBASE	PXA_CS2_PHYS
+#define EXT_GPIO_VBASE	0xf8100000
+#define EXT_GPIO_LENGTH	0x00100000
+
+static struct map_desc sha_pon_io_desc[] __initdata = {
+	{
+	.virtual	= EXT_GPIO_VBASE,
+	.pfn            = __phys_to_pfn(EXT_GPIO_PBASE),
+	.length         = EXT_GPIO_LENGTH,
+	.type           = MT_DEVICE
+	},
+};
+
+
+
+u32 sha_pon_cpld_get(unsigned int regoffset)
+{
+	return __raw_readl( EXT_GPIO_VBASE + (regoffset<<2) );
+}
+
+EXPORT_SYMBOL(sha_pon_cpld_get);
+
+
+static u32 sha_pon_cpld_control[8];
+static DEFINE_SPINLOCK(cpld_lock);
+
+void sha_pon_cpld_set(unsigned regoffset, u32 data)
+{
+	/* caller function needs spinlock. */
+	sha_pon_cpld_control[regoffset] = data;
+	__raw_writel( data, EXT_GPIO_VBASE + (regoffset<<2) );
+}
+
+EXPORT_SYMBOL(sha_pon_cpld_set);
+
+
+void sha_pon_gpio_bit_set(unsigned gpio, int value)
+{
+	u32	data, mask;
+	unsigned	regoffset;
+	unsigned long	flags;
+	
+	if( gpio < SHA_PON_GPIO_OFFSET_CPLD_W ) {
+		if (value) {
+			if( gpio < 32 )
+				GPSR0 = GPIO_bit(gpio);
+			else if( gpio < 64 )
+				GPSR1 = GPIO_bit(gpio);
+			else if( gpio < 96 )
+				GPSR2 = GPIO_bit(gpio);
+			else
+				GPSR3 = GPIO_bit(gpio);
+		} else {
+			if( gpio < 32 )
+				GPCR0 = GPIO_bit(gpio);
+			else if( gpio < 64 )
+				GPCR1 = GPIO_bit(gpio);
+			else if( gpio < 96 )
+				GPCR2 = GPIO_bit(gpio);
+			else
+				GPCR3 = GPIO_bit(gpio);
+		}
+	} else {
+		gpio -= SHA_PON_GPIO_OFFSET_CPLD_W;
+		
+		regoffset = (gpio >> 3) & 0x07;
+		mask = 1 << (gpio & 0x07);
+		
+		spin_lock_irqsave(&cpld_lock, flags);
+		
+		data = sha_pon_cpld_control[regoffset];
+		if (value)
+			data |= mask;
+		else
+			data &= ~mask;
+		sha_pon_cpld_control[regoffset] = data;
+		__raw_writel( data, EXT_GPIO_VBASE + (regoffset<<2) );
+		
+		spin_unlock_irqrestore(&cpld_lock, flags);
+	}
+}
+
+EXPORT_SYMBOL(sha_pon_gpio_bit_set);
+
+
+int sha_pon_gpio_bit_get(unsigned gpio)
+{
+	u32	data, mask;
+	unsigned	regoffset;
+	
+	if( gpio < SHA_PON_GPIO_OFFSET_CPLD_W ) {
+		mask = GPIO_bit(gpio);
+		if( gpio < 32 )
+			data = GPLR0;
+		else if( gpio < 64 )
+			data = GPLR1;
+		else if( gpio < 96 )
+			data = GPLR2;
+		else
+			data = GPLR3;
+		
+	} else if( gpio < SHA_PON_GPIO_OFFSET_CPLD_R ) {
+		gpio -= SHA_PON_GPIO_OFFSET_CPLD_W;
+		regoffset = (gpio >> 3) & 0x07;
+		mask = 1 << (gpio & 0x07);
+		
+		data = sha_pon_cpld_control[regoffset];
+		
+	} else {
+		gpio -= SHA_PON_GPIO_OFFSET_CPLD_R;
+		regoffset = (gpio >> 3) & 0x07;
+		mask = 1 << (gpio & 0x07);
+		
+		data = sha_pon_cpld_get(regoffset);
+		
+	}
+	
+	return (data & mask) ? 1 : 0;
+}
+
+EXPORT_SYMBOL(sha_pon_gpio_bit_get);
+
+
+
+
+static void sha_pon_cpld_bit_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+	unsigned	gpio;
+	
+	gpio = chip->base + offset;
+	
+	sha_pon_gpio_bit_set(gpio, value);
+}
+
+
+static int sha_pon_cpld_bit_get(struct gpio_chip *chip, unsigned offset)
+{
+	unsigned	gpio;
+	
+	gpio = chip->base + offset;
+	
+	return sha_pon_gpio_bit_get(gpio);
+}
+
+
+#define SHA_PON_CPLD_OUTPUT_CHIP(_n, _name)				\
+	{								\
+		.label	 = "cpld-control-" _name,			\
+		.get	 = sha_pon_cpld_bit_get,			\
+		.set	 = sha_pon_cpld_bit_set,			\
+		.base	 = SHA_PON_GPIO_OFFSET_CPLD_W + (_n) * 8,	\
+		.ngpio	 = 8,						\
+	}
+
+#define SHA_PON_CPLD_INPUT_CHIP(_n, _name)				\
+	{								\
+		.label	 = "cpld-status-" _name,			\
+		.get	 = sha_pon_cpld_bit_get,			\
+		.base	 = SHA_PON_GPIO_OFFSET_CPLD_R + (_n) * 8,	\
+		.ngpio	 = 8,						\
+	}
+
+
+static struct gpio_chip	sha_pon_cpld_chip[] = {
+	/* output 0-2 is used by keyboard matrix control. */
+	SHA_PON_CPLD_OUTPUT_CHIP(3, "0c"),
+	SHA_PON_CPLD_OUTPUT_CHIP(4, "10"),
+	SHA_PON_CPLD_OUTPUT_CHIP(5, "14"),
+	SHA_PON_CPLD_OUTPUT_CHIP(6, "18"),
+	SHA_PON_CPLD_OUTPUT_CHIP(7, "1c"),
+	
+	/* output 2 is used by keyboard matrix control. */
+	SHA_PON_CPLD_INPUT_CHIP(0, "00"),
+	SHA_PON_CPLD_INPUT_CHIP(1, "04"),
+	SHA_PON_CPLD_INPUT_CHIP(3, "0c"),
+	SHA_PON_CPLD_INPUT_CHIP(4, "10"),
+	SHA_PON_CPLD_INPUT_CHIP(5, "14"),
+	SHA_PON_CPLD_INPUT_CHIP(6, "18"),
+	SHA_PON_CPLD_INPUT_CHIP(7, "1c"),
+};
+
+
+static struct sysdev_class sha_pon_cpld_sysclass = {
+	.name		= "gpio",
+/*
+	.suspend	= pxa_gpio_suspend,
+	.resume		= pxa_gpio_resume,
+*/
+};
+
+
+static void sha_pon_init_cpld(void)
+{
+	int a;
+	
+	for (a = 0; a < 8; a++) {
+		sha_pon_cpld_control[a] = 0;
+#if 0	/* comment out, because of 003 hanged. */
+		sha_pon_cpld_set(a, 0);
+#endif
+	}
+	
+	for (a = 0; a < ARRAY_SIZE(sha_pon_cpld_chip); a++) {
+		gpiochip_add(&sha_pon_cpld_chip[a]);
+	}
+	
+/*
+	sysdev_class_register(&sha_pon_cpld_sysclass);
+*/
+}
+
+
+#define	SHA_PON_USB_STOP	0
+#define	SHA_PON_USB_HOST	1
+#define	SHA_PON_USB_CLIENT	2
+
+
+static int sha_pon003_usbscan(int mode_now)
+{
+	if( sha_pon_gpio_bit_get(SHA_PON003_I_DET_USB_VBUS) == 0 ) {
+		/* VBUS decected */
+		return( SHA_PON_USB_CLIENT );
+	}
+	
+	return( SHA_PON_USB_HOST );	/* normally host */
+}
+
+
+static int sha_pon007_usbscan(int mode_now)
+{
+	if( sha_pon_gpio_bit_get(SHA_PON007_I_DET_USB_MiniA) == 0 ) {
+		/* miniA cable inserted */
+		return( SHA_PON_USB_HOST );
+		
+	}
+	if( mode_now != SHA_PON_USB_HOST &&
+		sha_pon_gpio_bit_get(SHA_PON007_I_DET_USB_VBUS) == 0 ) {
+		/* VBUS decected */
+		return( SHA_PON_USB_CLIENT );
+	}
+	
+	return( SHA_PON_USB_STOP );	/* normally stop */
+}
+
+
+static void sha_pon007_usbpower(int mode_now)
+{
+	if( mode_now == SHA_PON_USB_HOST) {
+		sha_pon_gpio_bit_set( SHA_PON007_O_USB_POWER, 1 );	/* power ON */
+	} else {
+		sha_pon_gpio_bit_set( SHA_PON007_O_USB_POWER, 0 );	/* power OFF */
+	}
+}
+
+
+static int sha_pon011_usbscan(int mode_now)
+{
+	if( sha_pon_gpio_bit_get(SHA_PON011_I_DET_USB_MiniA) == 0 ) {
+		/* miniA cable inserted */
+		return( SHA_PON_USB_HOST );
+		
+	}
+	return( SHA_PON_USB_CLIENT );	/* normally client */
+}
+
+
+#define	USBSCAN_POLLRATE		msecs_to_jiffies(100)
+#define	USBSCAN_POLLRATE_LONG		msecs_to_jiffies(500)
+#define	USBSCAN_DISCONNECT		msecs_to_jiffies(5000)
+
+static int	sha_pon_usbmode_now, sha_pon_usbmode1, sha_pon_usbmode2, sha_pon_usbmode3;
+static int	(*sha_pon_usbscanfunc)(int mode_now);
+static void	(*sha_pon_usbpowerfunc)(int mode_now);
+
+static void sha_pon_usbport_poll(unsigned long data);
+static struct timer_list usb_timer = {
+	.function	= (void *)sha_pon_usbport_poll,
+	.data		= 0,
+};
+
+
+static void sha_pon_usbport_poll(unsigned long data)
+{
+	sha_pon_usbmode3 = sha_pon_usbmode2;
+	sha_pon_usbmode2 = sha_pon_usbmode1;
+	if( sha_pon_usbscanfunc == NULL ) {
+		sha_pon_usbmode1 = SHA_PON_USB_HOST;	/* normally host */
+	} else {
+		sha_pon_usbmode1 = sha_pon_usbscanfunc(sha_pon_usbmode_now);
+	}
+	
+	if( sha_pon_usbmode1 != sha_pon_usbmode_now &&
+			sha_pon_usbmode1 == sha_pon_usbmode2 &&
+			sha_pon_usbmode1 == sha_pon_usbmode3 ) {
+		/* change mode at 3 times of same status */
+		sha_pon_usbmode_now = sha_pon_usbmode1;
+		
+		printk( KERN_WARNING "(sha_pon_usbport_poll: USB port mode=%s)\n",
+			(sha_pon_usbmode_now==SHA_PON_USB_STOP)?"Stop":
+			(sha_pon_usbmode_now==SHA_PON_USB_HOST)?"Host":
+			(sha_pon_usbmode_now==SHA_PON_USB_CLIENT)?"Client":"not defined");
+		
+		if( sha_pon_usbpowerfunc == NULL ) {
+			printk( KERN_WARNING "(sha_pon_usbport_poll: Not supported USB power control)\n");
+		} else {
+			sha_pon_usbpowerfunc( sha_pon_usbmode_now );
+		}
+		switch( sha_pon_usbmode_now ) {
+		case SHA_PON_USB_HOST:
+			/* enable USB port2, Differencial, Host mode, D+/D- Pulldown */
+			UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
+			break;
+		case SHA_PON_USB_CLIENT:
+			/* enable USB port2, Differencial, Device mode, D+ Pullup(Full speed) */
+			UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
+			break;
+		default:
+			/* disable USB port2 */
+			UP2OCR = 0;
+			break;
+		}
+	}
+	if( sha_pon_usbmode_now == SHA_PON_USB_STOP ) {
+		mod_timer(&usb_timer, jiffies + USBSCAN_POLLRATE_LONG);
+	} else {
+		mod_timer(&usb_timer, jiffies + USBSCAN_POLLRATE);
+	}
+}
+
+
+static void sha_pon_init_usbport(void)
+{
+	/* disable USB port2 */
+	UP2OCR = 0;
+	
+	sha_pon_usbmode_now = SHA_PON_USB_STOP;
+	sha_pon_usbmode1 = SHA_PON_USB_STOP;
+	sha_pon_usbmode2 = SHA_PON_USB_STOP;
+	sha_pon_usbmode3 = SHA_PON_USB_STOP;
+	
+	sha_pon_usbscanfunc = NULL;
+	sha_pon_usbpowerfunc = NULL;
+	if ( machine_is_sha_pon003() || machine_is_sha_pon004() ) {
+		sha_pon_usbscanfunc = sha_pon003_usbscan;
+	}
+	if( machine_is_sha_pon007() ) {
+		sha_pon_usbscanfunc = sha_pon007_usbscan;
+		sha_pon_usbpowerfunc = sha_pon007_usbpower;
+	}
+	
+	if( machine_is_sha_pon011() ) {
+		sha_pon_usbscanfunc = sha_pon011_usbscan;
+	}
+	
+	if( machine_is_sha_pon020() ) {
+		/* FIXME */
+	}
+	
+	if( sha_pon_usbpowerfunc != NULL )
+		sha_pon_usbpowerfunc( sha_pon_usbmode_now );
+	
+	init_timer(&usb_timer);
+	mod_timer(&usb_timer, jiffies + USBSCAN_DISCONNECT);
+}
+
+
+/*
+ * Keyboard Device
+ */
+static struct platform_device sha_ponkbd_device = {
+	.name		= "sha_pon-keyboard",
+	.id		= -1,
+};
+
+
+/* sha_pon003, sha_pon004 LCD panel */
+static struct pxafb_mode_info sharp_ls037v7dw01_mode = {
+	.pixclock       = 39700,
+	.xres           = 480,
+	.yres           = 640,
+	.bpp            = 16,
+	.hsync_len      = 2,
+	.left_margin    = 78+64,	/* datasheet value +/- tuned value */
+	.right_margin   = 88-64,	/* datasheet value +/- tuned value */
+	.vsync_len      = 1,
+	.upper_margin   = 2,
+	.lower_margin   = 6,
+	.sync           = 0,	/*FB_SYNC_HOR_LOW_ACT | FB_SYNC_VERT_LOW_ACT*/
+};
+
+static struct pxafb_mach_info sharp_ls037v7dw01 = {
+	.modes		= &sharp_ls037v7dw01_mode,
+	.num_modes	= 1,
+	.lcd_conn	= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_RISE | LCD_ALTERNATE_MAPPING
+};
+
+
+/* sha_pon007 LCD panel */
+#define	sharp_ls028v7pw01	sharp_ls037v7dw01	/* compatible LCD panel */
+
+
+/* sha_pon011 LCD panel */
+static struct pxafb_mode_info pxa_sharp_ws011sh_mode = {
+	.pixclock       = 31384,	/* guessed value */
+	.xres           = 480,
+	.yres           = 800,
+	.bpp            = 16,
+	.hsync_len      = 2,	/* guessed value */
+	.left_margin    = 78-57,	/* guessed value +/- tuned value */
+	.right_margin   = 88+57,	/* guessed value +/- tuned value */
+	.vsync_len      = 1,	/* guessed value */
+	.upper_margin   = 2,	/* guessed value */
+	.lower_margin   = 6,	/* guessed value */
+	.sync           = 0,	/*FB_SYNC_HOR_LOW_ACT | FB_SYNC_VERT_LOW_ACT*/
+};
+
+static struct pxafb_mach_info pxa_sharp_ws011sh = {
+	.modes		= &pxa_sharp_ws011sh_mode,
+	.num_modes	= 1,
+	.lcd_conn	= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_RISE | LCD_ALTERNATE_MAPPING
+};
+
+
+/*ssp, touchscreen*/
+#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MASTER)
+
+#define	SHA_PON_SSP(n)	(n)	/* bus No. */
+
+static void sha_pon007_wait_for_hsync(void)
+{
+	while( gpio_get_value(SHA_PON007_I_DET_HSYNC) )
+		cpu_relax();
+
+	while( !gpio_get_value(SHA_PON007_I_DET_HSYNC) )
+		cpu_relax();
+}
+
+
+static struct ads7846_platform_data sha_pon007_tsc2046_info = {
+	.model			= 7846,
+	.vref_delay_usecs	= 100,
+
+	.x_min			= 160,
+	.x_max			= 3890,
+	.y_min			= 140,
+	.y_max			= 3850,
+
+	.debounce_max		= 3,
+	.debounce_tol		= 3,
+	
+	.gpio_pendown		= SHA_PON007_I_DET_TOUCHSCREEN,
+	
+	.wait_for_sync		= sha_pon007_wait_for_hsync,
+	.reverse_y		= 1,
+};
+
+static void sha_pon007_tsc2046_cs(u32 command)
+{
+	gpio_set_value(SHA_PON007_O_CS_TOUCHSCREEN, !(command == PXA2XX_CS_ASSERT));
+}
+
+static struct pxa2xx_spi_chip sha_pon007_tsc2046_chip = {
+	.cs_control	= sha_pon007_tsc2046_cs,
+};
+
+
+static struct spi_board_info sha_pon007_spi_devices[] = {
+	{
+		.modalias	= "ads7846",	/* tsc2048 compatible */
+		.max_speed_hz	= 2000000,
+		.bus_num	= SHA_PON_SSP(2),
+		.chip_select	= 0,
+		.platform_data	= &sha_pon007_tsc2046_info,
+		.controller_data= &sha_pon007_tsc2046_chip,
+		.irq		= gpio_to_irq(SHA_PON007_I_DET_TOUCHSCREEN),
+	},
+};
+
+
+static struct pxa2xx_spi_master sha_pon007_spi_info = {
+	.num_chipselect	= ARRAY_SIZE(sha_pon007_spi_devices),
+};
+
+
+static void __init sha_pon007_init_spi(void)
+{
+	int err;
+
+	err = gpio_request(SHA_PON007_O_CS_TOUCHSCREEN, "TSC2046_CS");
+	if (err)
+		return;
+
+	gpio_direction_output(SHA_PON007_O_CS_TOUCHSCREEN, 1);
+
+	pxa2xx_set_spi_info( SHA_PON_SSP(2), &sha_pon007_spi_info);
+	spi_register_board_info(ARRAY_AND_SIZE(sha_pon007_spi_devices));
+}
+
+#else	/* defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MASTER) */
+
+static inline void sha_pon007_init_spi(void) {}
+
+#endif	/* defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MASTER) */
+
+
+/* USB gadget */
+static struct pxa2xx_udc_mach_info sha_pon_udc_info = {
+	.udc_command = NULL,
+};
+
+
+/* USB Host */
+static struct pxaohci_platform_data sha_pon_usb_info = {
+	.flags		= ENABLE_PORT1 |	/* FIXME: What port1 connect to ? */
+				ENABLE_PORT2 |
+				ENABLE_PORT3,	/* FIXME: What port3 connect to ? */
+	
+	.port_mode	= PMM_NPS_MODE,		/* FIXME: Non-power switching mode */
+	/* 
+	 * WS003SH/WS004SH:
+	 *    .power_budget=0 because VBUS is for only internal device.
+	 * WS007SH/WS011SH:
+	 *    VBUS power supply is max100mA.(Sharp's web support page)
+	 *    but,,, .power_budget=0 !! because of convenience. :-)
+	 */
+	.power_budget	= 0,			/* VBUS power supply per port(unit:mA) */
+};
+
+
+/* MMC */
+static int sha_pon_mci_get_ro(struct device *dev)
+{
+	/* miniSD or microSD do not have write-protect function */
+	return 0;	/* read/write */
+}
+
+
+static struct pxamci_platform_data sha_pon_mmc_info = {
+	.ocr_mask	= MMC_VDD_32_33|MMC_VDD_33_34,		/* available voltages */
+	.get_ro		= sha_pon_mci_get_ro,			/* readonly detection */
+#if 0
+	unsigned long detect_delay;		/* delay in jiffies before detecting cards after interrupt */
+	int (*init)(struct device *, irq_handler_t , void *);
+	void (*setpower)(struct device *, unsigned int);
+	void (*exit)(struct device *, void *);
+#endif
+};
+
+
+/* Irda */
+static struct pxaficp_platform_data sha_pon_irda_info = {
+#if 0
+	int transceiver_cap;
+	void (*transceiver_mode)(struct device *dev, int mode);
+	int (*startup)(struct device *dev);
+	void (*shutdown)(struct device *dev);
+#endif
+};
+
+
+/* Camera */
+static struct pxacamera_platform_data sha_pon_camera_info = {
+	.flags		= PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | 
+				PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN | 
+				PXA_CAMERA_PCP,		/*  */
+	.mclk_10khz	= 1000,		/* FIXME: test value */
+#if 0
+	int (*init)(struct device *);
+	int (*power)(struct device *, int);
+	int (*reset)(struct device *, int);
+#endif
+};
+
+
+/* Audio */
+static pxa2xx_audio_ops_t sha_pon_audio_info = {
+#if 0
+	int (*startup)(struct snd_pcm_substream *, void *);
+	void (*shutdown)(struct snd_pcm_substream *, void *);
+	void (*suspend)(void *);
+	void (*resume)(void *);
+	void *priv;
+#endif
+};
+
+
+/* Led */
+static struct platform_device sha_pon_led_device = {
+	.name		= "sha_pon-led",
+	.id		= -1,
+};
+
+
+static struct platform_device *devices[] __initdata = {
+	&sha_ponkbd_device,
+	&sha_pon_led_device,
+};
+
+
+static unsigned long sha_pon_mfp[] __initdata = {
+	
+	/* FFUART */
+	GPIO98_FFUART_RTS,
+	GPIO99_FFUART_TXD,
+};
+
+
+static void __init sha_pon003_init(void)
+{
+	pxa2xx_mfp_config(ARRAY_AND_SIZE(sha_pon_mfp));
+	sha_pon_init_cpld();
+	set_pxa_fb_info(&sharp_ls037v7dw01);
+	pxa_set_udc_info(&sha_pon_udc_info);
+	pxa_set_ohci_info(&sha_pon_usb_info);
+	sha_pon_init_usbport();
+	pxa_set_mci_info(&sha_pon_mmc_info);
+	pxa_set_camera_info(&sha_pon_camera_info);
+/*
+	pxa_set_ac97_info(&sha_pon_audio_info);
+*/
+	platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+
+static void __init sha_pon007_init(void)
+{
+	pxa2xx_mfp_config(ARRAY_AND_SIZE(sha_pon_mfp));
+	sha_pon_init_cpld();
+	sha_pon007_init_spi();
+	set_pxa_fb_info(&sharp_ls028v7pw01);
+	pxa_set_udc_info(&sha_pon_udc_info);
+	pxa_set_ohci_info(&sha_pon_usb_info);
+	sha_pon_init_usbport();
+	pxa_set_mci_info(&sha_pon_mmc_info);
+	pxa_set_camera_info(&sha_pon_camera_info);
+/*
+	pxa_set_ac97_info(&sha_pon_audio_info);
+*/
+	platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+
+static void __init sha_pon011_init(void)
+{
+	pxa2xx_mfp_config(ARRAY_AND_SIZE(sha_pon_mfp));
+	sha_pon_init_cpld();
+	set_pxa_fb_info(&pxa_sharp_ws011sh);
+	pxa_set_udc_info(&sha_pon_udc_info);
+	pxa_set_ohci_info(&sha_pon_usb_info);
+	sha_pon_init_usbport();
+	pxa_set_mci_info(&sha_pon_mmc_info);
+	pxa_set_camera_info(&sha_pon_camera_info);
+/*
+	pxa_set_ac97_info(&sha_pon_audio_info);
+	pxa_set_ficp_info(&sha_pon_irda_info);
+*/
+	platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+
+static void __init sha_pon_map_io(void)
+{
+	pxa_map_io();
+	iotable_init(sha_pon_io_desc, ARRAY_SIZE(sha_pon_io_desc));
+	
+	/* for use I SRAM as framebuffer.  */
+	PSLR = (PSLR&~0x002ff0f3) | 0x00000F04;
+			/* SL_R0-3 = 1111 : SRAM0-3 retains state in sleep mode */
+			/* SL_PI = 01 : PI power domain retains state in sleep mode */
+			/*   PI domain -- PWR_I2C & timer13M */
+			/* write 0 to reserve bit */
+	
+	PSTR = 0x00000f04;		/* test value */
+	PCFR = 0x00000000;		/* test value */
+
+#if 0	/* cannot access pxafb register at this, because pxafb is'nt initialized yet... */
+	/* FIXME: LCCR4-bit31 PCDDIV=1 is better than PCDDIV=0, if pxafb.c allows. */
+#define PXAFB_LCCR4       __REG(0x44000010)  /* LCD Controller Control Register 4 */
+	PXAFB_LCCR4 = 0x00000000L;		/* PCDDIV=1(WM)->0(Linux) */
+#endif
+
+
+	/* initialize sleep mode regs (wake-up sources, etc) : NOT tested */
+/*
+	PGSR0 = 0x00008800;
+	PGSR1 = 0x00000002;
+	PGSR2 = 0x0001FC00;
+	PGSR3 = 0x00001F81;
+	PWER  = 0xC0000002;
+	PRER  = 0x00000002;
+	PFER  = 0x00000002;
+*/
+
+}
+
+
+MACHINE_START(SHA_PON003, "Sharp W-ZERO3 WS003SH")
+	.phys_io	= 0x40000000,
+	.io_pg_offst	= (io_p2v(0x40000000) >> 18) & 0xfffc,
+	.boot_params	= 0xa0000000,
+	.map_io		= sha_pon_map_io,
+	.init_irq	= pxa27x_init_irq,
+	.timer		= &pxa_timer,
+	.init_machine	= sha_pon003_init,
+MACHINE_END
+
+
+MACHINE_START(SHA_PON004, "Sharp W-ZERO3 WS004SH")
+	.phys_io	= 0x40000000,
+	.io_pg_offst	= (io_p2v(0x40000000) >> 18) & 0xfffc,
+	.boot_params	= 0xa0000000,
+	.map_io		= sha_pon_map_io,
+	.init_irq	= pxa27x_init_irq,
+	.timer		= &pxa_timer,
+	.init_machine	= sha_pon003_init,
+MACHINE_END
+
+
+MACHINE_START(SHA_PON007, "Sharp W-ZERO3[es] WS007SH")
+	.phys_io	= 0x40000000,
+	.io_pg_offst	= (io_p2v(0x40000000) >> 18) & 0xfffc,
+	.boot_params	= 0xa0000000,
+	.map_io		= sha_pon_map_io,
+	.init_irq	= pxa27x_init_irq,
+	.timer		= &pxa_timer,
+	.init_machine	= sha_pon007_init,
+MACHINE_END
+
+
+MACHINE_START(SHA_PON011, "Sharp Advanced/W-ZERO3[es] WS011SH")
+	.phys_io	= 0x40000000,
+	.io_pg_offst	= (io_p2v(0x40000000) >> 18) & 0xfffc,
+	.boot_params	= 0xa0000000,
+	.map_io		= sha_pon_map_io,
+	.init_irq	= pxa27x_init_irq,
+	.timer		= &pxa_timer,
+	.init_machine	= sha_pon011_init,
+MACHINE_END
+
+
+MACHINE_START(SHA_PON020, "Sharp WILLCOM 03 WS020SH")
+	.phys_io	= 0x40000000,
+	.io_pg_offst	= (io_p2v(0x40000000) >> 18) & 0xfffc,
+	.boot_params	= 0xa0000000,
+	.map_io		= sha_pon_map_io,
+	.init_irq	= pxa27x_init_irq,
+	.timer		= &pxa_timer,
+	.init_machine	= sha_pon011_init,
+MACHINE_END
+
-- 
1.4.4.4

